Abstract:
As semiconductor technology advances and devices continue to shrink, imaging buried interfaces and defects at the atomic scale has become a grand challenge, as highlighted in the CHIPS Advanced Metrology for Future Microelectronics Manufacturing roadmap. In this talk, I will highlight the use of Multislice Electron Ptychography (MEP) to meet this challenge. MEP is a cutting-edge imaging technique that provides sub-Ångström in-plane and nanometer-scale depth resolution for 3D reconstructions of structures, in this case modern Gate-All-Around devices. MEP surpasses conventional scanning transmission electron microscopy (STEM) methods like through-focal annular dark field (tf-ADF) and through-focal integrated differential phase contrast (tf-iDPC) imaging by producing high-resolution images in a single scan. This approach is not only more dose-efficient but also reduces imaging artifacts such as tilt distortions and effects of multiple scattering. Through both simulations and experimental results, I will show how MEP reveals buried defects and atomic-scale irregularities in both the crystalline and amorphous regions of GAA devices – insights that are often missed by traditional techniques yet are crucial for guiding the development of these modern transistors.
 

Location (hybrid):
In person:   438 / C010

Teams link: https://teams.microsoft.com/l/meetup-join/19%3ameeting_NWJjODIxOTktZmYw…