On 2011-06-30 Circuit6 Engineering wrote:
> I am very new to EPICS and only just started to work my way through the
> lectures, documentation and program text. I wonder how lean and trim a
> channel access server could be? For example, is it ridiculous to think
> about running CA Server on a 100MHz ARM Cortex-M3 with 256 KB flash
> memory, 64 KB SRAM and 10/100 Mbps Ethernet?
Hmm, interesting question, 256K of Flash and 64K of RAM seems pretty tiny
nowadays. I have a pretty minimal CAS program which I build statically on
Linux; after I strip the binary, the executable is 702KB built for x86_64, and
817KB built for x86, and that doesn't include all the Linux system libraries.
I don't know how much smaller an ARM version might be, but I think it most
likely that the answer is no way with our current code, because you have to
allow for the rest of the OS as well.
As a comparison, compiling our example IOC application for the RTEMS-mvme3100
target (a 32-bit PowerPC CPU) results in a 1.6MB bootable binary image (which
includes the RTEMS OS code). Now that's not using the same code as the CAS
program I was discussing above and it is actually a full IOC, but it gives
another minimal example. I also looked at the boot images for several of our
ColdFire-based IOCs here, the bootable image for them are all in the 1.7-1.8MB
> I am also very new to RTEMS. If RTEMS is too heavy for a minimal hardware
> environment, could a trim CA server be ported to FreeRTOS with the lwIP
> (Lightweight IP) stack without serious re-engineering?
I think you'd be in the "serious re-engineering" range, although I don't know
anything about FreeRTOS or lwIP — I'm not saying that porting EPICS would
necessarily be that hard, but the code volume may be too big to overcome.
Optimization is the process of taking something that works and
replacing it with something that almost works, but costs less.
-- Roger Needham
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